Job Profile : Verification Engineer
Experience- 3 To 6 Yrs
Location - Bengaluru
Job Description:
Execution of test scenarios in pre-silicon (simulation, emulation) and post-silicon environments
Job Brief:
Portable Stimulus (PSS) is a new industry standard that enables specification of test intent in a verification environment agnostic way. A test intent written in PSS can be used to generate verification scenarios for simulation, emulation, FPGA and post-Silicon environments. PSS enables a significant productivity leap in chip/SoC Verification. Undoubtedly, PSS is the next big thing after System Verilog/UVM - it carries forward tried and tested techniques from System Verilog (like Constraint Driven Verification and Coverage) to system level for pre/post-silicon verification.
Vayavya Labs has been one of the original contributors to this industry standard and actively driving the discussion for the last many years.
Many companies are adopting PSS to meet the challenges of verifying today’s complex systems. Vayavya Labs is helping with this transition - with years of expertise in Software driven Verification and the PSS standard itself. See https://vayavyalabs.com/pss-hsi/ for more information on the standard and what we as Vayavya Labs are contributing.
You will be part of the team working on Portable Stimulus technologies (PSS) and developing PSS based scenarios for different SoC sub-systems - PCIe, UCIe, CXL, GPU, MIPI CSI/DSI, Ethernet to name a few. Other than functional verification, you will also be working on system level power verification, cache coherency etc. Training on PSS will be provided as part of the ramp-up phase.
This is a great learning opportunity for someone already familiar with System Verilog/UVM based verification. You get a chance to work at the leading-edge of SoC verification technologies.
Roles & Responsibilities:
Must Have Technical Skills:
Good to Have Technical Skills:
Behavioral/ Non Technical: